Scientists in China have developed a tensor processing unit (TPU) that uses carbon-based transistors instead of silicon – and they say it's extremely energy efficient.
pretty impressive. Probably needs a ton of further development to be manufacture-able though.
However, the fabrication of large-scale CNT ICs with thousands of transistors remains challenging. To start, the semiconducting purity of CNT materials (typically around 99.99%) is too low, so that this requires specialized logic gates to reduce logic errors at the cost of transistor count, area and energy consumption
Furthermore, low driving currents and high-performance variations due to unoptimized fabrication processes limit the scalability, performance and uniformity of large-scale CNT ICs.
Non-tracking link to the study: https://www.nature.com/articles/s41928-024-01211-2 (not on sci-hub yet but someone could request a copy from the authors on ResearchGate and upload it to libgen maybe?)
Okay so I read more and I think the headline figure (1700 times more efficient) is made up/due to a significant math error. You might want to correct the title.
The paper claims that a simulated scaled-up 8-bit version of this tech (180nm CNT transistor TPUs) could theoretically reach 1TOPS/W. That is less than the efficiency the author specifies for the google TPU (4TOPS/2W = 2TOPS/W)
Then they go on to speculate that a lower process node will probably improve that efficiency greatly (very likely true, but no figures listed in the public preview of the paper, even simulations)
The author of the article assumed (wrongly) that the actual chip they made could do 1TOPS (it's only 3000 transistors and can only do 2-bit math), and that it consumed 295 microwatts to do so, for an efficiency of 3389TOPS/W. (roughly 1700x the 2TOPS/W of the google chip) That's of course ludicrous.
pretty impressive. Probably needs a ton of further development to be manufacture-able though.
Non-tracking link to the study: https://www.nature.com/articles/s41928-024-01211-2 (not on sci-hub yet but someone could request a copy from the authors on ResearchGate and upload it to libgen maybe?)
Yeah, gonna take a few years to iron the kinks out. It's nice to know that it does work in principle though.
Okay so I read more and I think the headline figure (1700 times more efficient) is made up/due to a significant math error. You might want to correct the title.
The paper claims that a simulated scaled-up 8-bit version of this tech (180nm CNT transistor TPUs) could theoretically reach 1TOPS/W. That is less than the efficiency the author specifies for the google TPU (4TOPS/2W = 2TOPS/W)
Then they go on to speculate that a lower process node will probably improve that efficiency greatly (very likely true, but no figures listed in the public preview of the paper, even simulations)
The author of the article assumed (wrongly) that the actual chip they made could do 1TOPS (it's only 3000 transistors and can only do 2-bit math), and that it consumed 295 microwatts to do so, for an efficiency of 3389TOPS/W. (roughly 1700x the 2TOPS/W of the google chip) That's of course ludicrous.
ah yeah good point, updated the title