It is becoming clearer that China’s plan to cut reliance on Western chip technology revolves around homegrown chips built using the open RISC-V architecture, which is also gaining popularity in […]
RISC architectures aren't necessarily more resource efficient or less computationally powerful than CISC architectures. The reason RISC architectures (or microarchitectures, in Intel's case) took over is because they allow certain optimizations (simpler pipelining, simpler functional units for more superscalar processors, smaller processor cores so you can fit more cores in a single package, etc) that allow faster and more parallel execution of instructions. Eventually, this ended up being faster than having more complicated instructions that did more in a single operation (like in the x86 architecture). Also, programs written (or compiled) for RISC architectures tend to require more memory just because each instruction accomplishes less than on a CISC architecture.
RISC architectures aren't necessarily more resource efficient or less computationally powerful than CISC architectures. The reason RISC architectures (or microarchitectures, in Intel's case) took over is because they allow certain optimizations (simpler pipelining, simpler functional units for more superscalar processors, smaller processor cores so you can fit more cores in a single package, etc) that allow faster and more parallel execution of instructions. Eventually, this ended up being faster than having more complicated instructions that did more in a single operation (like in the x86 architecture). Also, programs written (or compiled) for RISC architectures tend to require more memory just because each instruction accomplishes less than on a CISC architecture.
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